R&D Engineering, Staff Engineer

Alternate Job Titles Memory Circuit Design Engineer We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You have spent the last few years deep in memory circuit design, the kind of work where a 10mV margin shift can mean the difference between a product that ships and one that doesn't. You understand CMOS fundamentals not as theory but as something you use every day to explain why a bitcell behaves the way it does under corner conditions. You have run enough SPICE simulations to know when a result smells wrong before you even look at the waveform. You are comfortable sitting with a characterization dataset, spotting the outlier, and tracing it back to a setup issue or a real circuit behavior that matters. Working across time zones doesn't faze you. You ask questions when something is unclear, you share what you learn, and you don't wait for perfect documentation to move forward. You want to build memory IP that works, not just in simulation but in silicon, and you care about the details that make that happen. What You'll Be Doing Design and optimize memory circuits including SRAM bitcells, sense amplifiers, decoders, and peripheral blocks for advanced process nodes Run SPICE simulations using tools like HSPICE or Spectre to validate circuit performance across PVT corners and operating conditions Perform margin analysis and characterization to ensure robustness of memory designs under voltage, temperature, and process variation Debug circuit-level issues by analyzing simulation results, identifying failure modes, and proposing design fixes Collaborate with verification, layout, and product teams across Bengaluru and global sites to close design and characterization loops Document design decisions, characterization results, and analysis flows for use by the broader memory IP team Support silicon bring-up and post-silicon debug by correlating measured data with simulation predictions The Impact You Will Have Your circuit designs will directly enable memory compilers used in SoCs across automotive, mobile, and AI applications The margin analysis you perform will determine whether a memory IP meets yield and reliability targets in production silicon Your characterization flows will become the foundation for how the team validates new memory architectures The bugs you catch in simulation will save months of silicon respins and customer escalations Your collaboration across sites will accelerate design closure and reduce iteration cycles on critical IP deliverables The documentation you create will help onboard new engineers and scale the team's design capacity Your work will contribute to memory IP that ships in millions of devices worldwide What You'll Need BTech or MTech in Electronics Engineering, VLSI Engineering, or equivalent from a recognized institution 4 to 6 years of hands-on experience in memory circuit design, characterization, or verification Strong understanding of SRAM, register file, or embedded memory architectures and circuit topologies Proficiency in SPICE simulation tools such as HSPICE, Spectre, or similar for circuit analysis and debug Solid foundation in CMOS fundamentals, device physics, and digital circuit design principles Experience with margin analysis, Monte Carlo simulation, or statistical characterization methods is a strong plus Familiarity with scripting languages like Python, Perl, or TCL for automating simulation and analysis flows is helpful Who You Are You can look at a SPICE deck, spot a setup error, and fix it without needing someone to walk you through it You communicate clearly in written and verbal form, whether you are explaining a circuit tradeoff to a peer or summarizing characterization results in a review You work well with distributed teams and are comfortable coordinating across time zones without losing momentum You are motivated by learning, whether that means understanding a new process node or digging into a failure mode you have not seen before You do not get stuck when documentation is thin or requirements are evolving, you ask the right questions and keep moving You take ownership of your work, from simulation setup through final characterization sign-off The Team You'll Be Part Of Your recruiter will share more about the team structure and mission during the interview process. Rewards and Benefits We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.