STA Engineer

STA Engineer (5-10 Years) KEY RESPONSIBILITIES: Responsible for Multi Voltage domain STA environment setup, execution and timing closure Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checks Ensuring timing correlation between PnR <-> STA and timely feedbacks to PD team Generating block level HS session and using Top context from SoC for Block-SoC Interface timing closure. Generating timing ECO using Tweaker/PrimeClosure.